Universal Flash Storage Host Controller Interface (UFSHCI), Unified Memory Extensionstandard by JEDEC Solid State Technology Association, 09/01/2013

TEST PROCEDURE FOR THE MANAGEMENT OF SINGLE-EVENT EFFECTS IN SEMICONDUCTOR DEVICES FROM HEAVY ION IRRADIATIONstandard by JEDEC Solid State Technology Association, 12/01/1996

RESISTANCE TO SOLDER SHOCK FOR THROUGH-HOLE MOUNTED DEVICESstandard by JEDEC Solid State Technology Association, 11/01/2016

Joint JEDEC/ECA Standard: Definition of "Low-Halogen" for Electronic Productsstandard by JEDEC Solid State Technology Association, 04/01/2015

PROCEDURE FOR CHARACTERIZING TIME-DEPENDENT DIELECTRIC BREAKDOWN OF ULTRA-THIN GATE DIELECTRICSstandard by JEDEC Solid State Technology Association, 08/01/2003

BALL GRID ARRAY PINOUT FOR 1-, 2-, AND 3-BIT LOGIC FUNCTIONSstandard by JEDEC Solid State Technology Association, 03/01/2004

FLIP CHIP TENSILE PULLstandard by JEDEC Solid State Technology Association, 07/01/2014

STANDARD FOR DESCRIPTION OF A 3.3 V, ZERO DELAY CLOCK DISTRIBUTION DEVICE COMPLIANT WITH THE JESD21-C PC133 REGISTERED DIMM SPECIFICATIONstandard by JEDEC

Graphics Double Data Rate (GDDR6) SGRAM Standardstandard by JEDEC Solid State Technology Association, 07/01/2018

HIgh Bandwidth Memory DRAM (HBM1, HBM2)standard by JEDEC Solid State Technology Association, 11/01/2018

REQUIREMENTS FOR HANDLING ELECTROSTATIC-DISCHARGE-SENSITIVE (ESDS) DEVICESstandard by JEDEC Solid State Technology Association, 12/01/1999

POD15 - 1.5 V Pseudo Open Drain I/Ostandard by JEDEC Solid State Technology Association, 10/01/2009