JEDEC JESD77D
Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devicesstandard by JEDEC Solid State Technology Association, 08/01/2012
Terms, Definitions, and Letter Symbols for Discrete Semiconductor and Optoelectronic Devicesstandard by JEDEC Solid State Technology Association, 08/01/2012
HIgh Bandwidth Memory (HBM) DRAMstandard by JEDEC Solid State Technology Association, 11/01/2015
PRECONDITIONING OF PLASTIC SURFACE MOUNT DEVICES PRIOR TO RELIABILITY TESTINGstandard by JEDEC Solid State Technology Association, 10/01/2015
MULTIMEDIACARD (MMC) ELECTRICAL STANDARD, STANDARD CAPACITY (MMCA, 4.1)standard by JEDEC Solid State Technology Association, 06/01/2007
COMPONENT QUALITY PROBLEM ANALYSIS AND CORRECTIVE ACTION REQUIREMENTS (INCLUDING ADMINISTRATIVE QUALITY PROBLEMS)standard by JEDEC Solid State Technology Association, 12/01/1999
ADDENDUM No. 4 to JESD12 - METHOD OF SPECIFICATION OF PERFORMANCE PARAMETERS FOR CMOS SEMICUSTOM INTEGRATED CIRCUITSAmendment by JEDEC Solid State Technology
EMBEDDED MULTIMEDIACARD (e*MMC) PRODUCT STANDARD, STANDARD CAPACITYstandard by JEDEC Solid State Technology Association, 07/01/2007
DEFINITION OF THE SSTE32882 REGISTERING CLOCK DRIVER WITH PARITY AND QUAD CHIP SELECTS FOR DDR3/DDR3L/DDR3U RDIMM 1.5 V/1.35 V/1.25 V APPLICATIONSstandard by
Graphics Double Data Rate (GDDR5) SGRAM Standardstandard by JEDEC Solid State Technology Association, 02/01/2016
STANDARD FOR DESCRIPTION OF 2.5 V CMOS LOGIC DEVICES WITH 3.6 V CMOS TOLERANT INPUTS AND OUTPUTSstandard by JEDEC Solid State Technology
PACKAGE WARPAGE MEASUREMENT OF SURFACE-MOUNT INTEGRATED CIRCUITS AT ELEVATED TEMPERATUREstandard by JEDEC Solid State Technology Association, 10/01/2009
INSTRUMENTATION CHIP DATA SHEET FOR FBDIMM DIAGNOSTIC SENSELINESstandard by JEDEC Solid State Technology Association, 11/01/2006