Descriptive Designation System for Semiconductor-device Packagesstandard by JEDEC Solid State Technology Association, 01/01/2016

SEMICUSTOM INTEGRATED CIRCUITS (FORMERLY PUBLISHED AS STANDARD FOR GATE ARRAY BENCHMARK SET)standard by JEDEC Solid State Technology Association, 06/01/1985

SERIAL INTERFACE FOR DATA CONVERTERSstandard by JEDEC Solid State Technology Association, 04/01/2008

SPECIAL REQUIREMENTS FOR MAVERICK PRODUCT ELIMINATION AND OUTLIER MANAGEMENTstandard by JEDEC Solid State Technology Association, 11/01/2008

Low Power Double Data Rate 4 (LPDDR4)standard by JEDEC Solid State Technology Association, 2015

ADDENDUM No. 7 to JESD24 - COMMUTATING DIODE SAFE OPERATING AREA TEST PROCEDURE FOR MEASURING dv/dt DURING REVERSE RECOVERY OF POWER TRANSISTORSAmendment

LEAD INTEGRITYstandard by JEDEC Solid State Technology Association, 05/01/2003

Byte Addressable Energy Backed Interfacestandard by JEDEC Solid State Technology Association, 12/01/2015

STANDARD FOR DESCRIPTION OF 3.3 V NFET BUS SWITCH DEVICESstandard by JEDEC Solid State Technology Association, 08/01/2001

ADDENDUM No. 1 to JESD24 - METHOD FOR MEASUREMENT OF POWER DEVICE TURN-OFF SWITCHING LOSSAmendment by JEDEC Solid State Technology Association, 10/01/1989

LIFE TEST METHODS FOR PHOTOCONDUCTIVE CELLSstandard by JEDEC Solid State Technology Association, 09/01/1969

HIGH BANDWIDTH MEMORY (HBM) DRAMstandard by JEDEC Solid State Technology Association, 10/01/2013